1. Field of the Invention
This invention relates to integrated circuits.
2. Description of the Prior Art
Some data processing integrated circuits comprise a number of data handling devices such as a microprocessor, random access memory (RAM), data buffers or other peripheral logic functions, fabricated as a single semiconductor chip. These on-chip data handling devices are interconnected to allow communication of data and control information between the devices, for example by means of a common interconnection bus. The interconnection bus is commonly connected (via a buffering circuit) to input/output terminals of the integrated circuit, to allow communication of data and control information between the on-chip devices and external (off-chip) data handling devices.
This type of integrated circuit can be designed and fabricated in a modular fashion. In this approach, an integrated circuit designer selects From a number of pre-designed modules, each comprising a data handling device, and has only to arrange the relative positions and interconnections of the modules in order to design an integrated circuit for use in a particular application.
It is also known to provide a test or diagnostic access bus to connect each input and output of each on-chip data handling device (or at least an on-chip microprocessor module) to a terminal of the integrated circuit. The test access bus is used to allow testing of the on-chip data handling devices, as part of the manufacturing process. This testing involves an external chip testing device applying test inputs to the on-chip data handling devices via the test access bus, and then detecting the outputs generated by the on-chip data handling devices in response to the test inputs.
However, in a modular integrated circuit of the type described above, the advantages of the modular approach are reduced if the designer is required to provide an external terminal connected to each input and output of each data handling device in order to allow the integrated circuit to be fully tested. For a relatively complex data handling device such as a microprocessor module, the number of such terminals required for that device may be very large. For example, a 32-bit microprocessor may require a test access bus carrying 32-bit address signals, 32-bit data signals, about 13 bits of control signals and about 14 bits of status signals, making a total of 91 terminals.
A previously proposed, but unsatisfactory, solution to this problem is to develop bespoke versions of the test signals to be generated by the chip testing device, for use with individual integrated circuits. These chip-specific test signals are applied to the integrated circuit over a reduced width test access bus. However, the development of such bespoke test signals is time consuming and expensive.